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回復 4# 的帖子
1. Using technology file to create a library$ X4 P* D3 z' g- N# r+ J, b* N& C
2. Do stream in with cell type definition file. Specify some special layers' number. IE : Boundary Layer is 63.
( _8 m! U4 w0 t9 F. Y+ @2 M3. Open new created library, and create some metal blockage if need.1 j" `6 n1 ` m# h A
4. Do smash if need.
7 k' I1 R7 {" l1 z1 Y5. remove some unnecessary extension txst. IE VDD ---> VDD
8 w! v( m/ F' W0 C. k6. Define power,ground as well as in/out port
8 c- t1 u0 s" J0 c7.Extract Blockage,Pin and Via by using command auExtractBlockagePinVia.
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5 M. n0 D/ d' o, aThe processes listed above is my method to do data preparation. Maybe someone know other best way for this issue. Please share it with us.
% G! ]" K! Z3 Y; z1 g0 s$ Q-->我要怎麼做才可以把 ANALOG中 重複性較高的部份交給 APR去做?
3 \- Z; n }8 @& OI don't understand your question. Do you want APR toll to place and route your analog block? It is a bad idea if your answer is yes. |
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