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Sr Analog Design Engineer* f: C4 S J+ c# \6 a
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公 司:A famous IC company( p5 m7 O7 G" X: b
工作地点:上海' d+ S7 c- ^9 T5 m
! n9 v; q8 W0 d; ] u i, x) |Responsibilities:
7 q, L. r- s1 n l• Implement critical analog circuitries, such as charge pump, bandgap, reference voltage/current, ADC/DAC etc., for memory operation
8 ?$ }: G) D# p• Perform transistor level simulations for functionality, performance and optimization [6 N+ a" X6 O- Q2 F, I) ^8 G, u, k
• Perform block level and full chip level simulations using mixed-signal simulators
0 k$ B0 E0 T7 a7 o9 Z) }2 _, z% F: l/ v• Define, design and verify architecture for embedded non-volatile memories ' K- A7 [; A M$ y6 T- z6 o) W
• I/O design experience a plus ) [% B, S& S3 {
• Other duties as and when required.
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Mandatory Skills: % R, [1 W, m1 Y1 B' L" f
• Must be good at problem solving - d# z1 p$ p! r: ~9 \
• Must have the ability to communicate effectively with different levels of employees/customers 8 K9 {) o( c n
• Knowledge and ability to use computer tools such as HSPICE, SPECTRE, digital simulation(NC-verilog), mixed-signal simulator, static timing analysis and test generation & W* B* P' C! p! ?+ @% j
• Knowledge of layout verification tools and debugging techniques ; }' t7 l( R$ f+ s3 t
• Some knowledge of digital RTL design and logic synthesis preferred 0 l# `) V D: R/ |0 ]% z* {$ S
9 F! ^& {$ @. jEducation:Bachelor Degree or higher preferred
8 l S, S4 V; d' ?. Y- KExperience:Minimum of 4 year’s experience in R&D center in Semiconductor field , s# [6 u0 h& k- ~! O
Position:Regular 5 p+ W9 {$ r$ c7 G. G& m0 X; q
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