Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

semico_ljj

Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

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semico_ljj

Abstract -- The diode operated in forward-biased condition has
been widely used as an effective on-chip ESD protection device at
GHz RF and high-speed I/O pads due to the small parasitic
: o) X; [6 c- s3 _& }loading effect and high ESD robustness in CMOS integrated
, S! L2 y; e% [7 X2 c5 R! T8 z( gcircuits (ICs). This work presents new ESD protection diodes
) w* a' T2 s  Crealized in the octagon, waffle-hollow, and octagon-hollow layout
styles to improve the efficiency of ESD current distribution and
% ~) R. {$ b) d6 Nto reduce the parasitic capacitance. The new ESD protection
diodes can achieve smaller parasitic capacitance under the same
ESD robustness level as compared to the waffle diode. Therefore,
the signal degradation of GHz RF and high-speed transmission
can be reduced due to smaller parasitic capacitance from the new
proposed diodes.