synchronus reset with simple respected clock.it is required more no of gates,and it is didnt have metastabilty problem.it is working is slow. - P% I2 }, b! F2 v m4 ^4 c: m8 F2 C* N5 `& m9 R2 f
asynchronous reset with out respected to the clock.it is required less no .of gates.it is suffer to the metastability problem.it is working is fast