synchronus reset with simple respected clock.it is required more no of gates,and it is didnt have metastabilty problem.it is working is slow. - k+ \9 Q) k' F$ T6 a0 J 8 [' g+ Q; d4 x+ c; a2 jasynchronous reset with out respected to the clock.it is required less no .of gates.it is suffer to the metastability problem.it is working is fast