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Multi Core Debug Solution IP

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發表於 2008-7-25 12:21:33 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
IPextreme, Inc. / White Paper0 @5 R! P9 F5 e% b8 W; w

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White Paper Content:7 a" s6 O! F% y  P0 |% J, O' {
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The speed and density of today's multi-core SoCs have outgrown traditional debugging methodologies. To debug a system in its target environment, where problems often only occur, a debugger needs access to an enormous amount of trace data from various processors, buses, and signals within the SoC. Getting this data off-chip to the debugger in real time requires on the order of 100 Gbits/sec of bandwidth at the chip I/O, which is not practical using either dedicated debug pins or shared debug/functional pins. The problem is further compounded by the need to analyze all of that data.3 Q- k* M  g8 [; F6 B0 \6 H
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Infineon has successfully developed and deployed a technology known as the Multi-Core Debug Solution(MCDS)to address that problem. Using advanced on-chip trace techniques that include on-chip trigger generation, trace data compression, and trace storage, MCDS provides only the relevant trace data to the debug tool. Without adding pins to the chip, MCDS enables real-time, in-system debug and performance optimization.
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發表於 2008-8-4 23:37:15 | 只看該作者
最近就是在開發multi-core的專案...想要喵喵看哈哈
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