Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

semico_ljj

Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits
* q) s$ N+ G5 ]* i5 x3 ]

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semico_ljj

Abstract -- The diode operated in forward-biased condition has
9 P/ ]7 V# l* N7 ^( |# U) z' xbeen widely used as an effective on-chip ESD protection device at
GHz RF and high-speed I/O pads due to the small parasitic
9 |6 P9 ~0 h9 Y: @loading effect and high ESD robustness in CMOS integrated
' K2 w/ }- j; ~/ ~  U- ucircuits (ICs). This work presents new ESD protection diodes
realized in the octagon, waffle-hollow, and octagon-hollow layout
7 c" B. J+ H& ^0 Pstyles to improve the efficiency of ESD current distribution and
) h* z# v" ^3 T: u7 Eto reduce the parasitic capacitance. The new ESD protection
: s: ^1 i, z; c8 u) n! ]; e9 Cdiodes can achieve smaller parasitic capacitance under the same
+ X0 s4 A' O! g  D: BESD robustness level as compared to the waffle diode. Therefore,
5 |4 {' n9 i9 n! D( m5 Ythe signal degradation of GHz RF and high-speed transmission
can be reduced due to smaller parasitic capacitance from the new
# W) W, G# ~1 W2 Fproposed diodes.

xp212125o

看起來有幫助
感謝分享
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thank you ~

linyuejing

下載來看看
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應該有幫助
0 L$ ]; I2 H3 z4 C  l3 o" x( A# F謝謝囉

caesarxl

谢谢楼主分享，非常感谢

oika_51

看起來有幫助
感謝分享

linger809

Abstract -- The diode operated in forward-biased condition has
been widely used as an effective on-c ...
semico_ljj 發表於 2010-6-25 08:50 AM

不知道这种形式的ＩＯ有没有经过测试，实际的效果和预想的有多少的差别，thanks!

oscargo

正為ESD耐受度傷腦筋----

zhifj86

thank you very much for your sharing

sslin

謝謝大大的分享~~知識因分享而壯大！

& e9 D5 u& T7 w( s+ X" b~只有站在巨人的肩膀上才不會被食人族吃了!