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招聘公司:A famous IC company
( G! s( ]$ h1 b7 W5 `% F; H% N招聘岗位:ASIC Physical Design Engineer- |8 H# X4 p) b& _1 w/ L! i
工作地点:Shanghai; o/ {, d# W4 V4 n9 L5 b" p
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岗位描述:" N1 p/ g: d3 H& v* F
- owning, and maintaining P & R scripts for block gate netlist to GDSII - P & R, extraction, Power IR, EM of block level and Physical verification - Work with front end engineer for timing closure activities 0 P6 l* ^' o4 X2 D( F, M' W0 x
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职位要求:9 v& m: ^4 J- S& L/ ]2 Q/ @' x k( S3 d
• BSEE is required • 3+ years of ASIC/SoC Physical Design; floor planning, power grid customization, P&R, CTS, DRC, LVS, etc... • Experience driving CTS to meet requirements • Experience with either one of P&R tools; Cadence EDI, or Synopsys IC Compiler • Proficiency using TCL, Perl and make scripting |
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