The wholechip floorplan is very important before you start the layout. $ k! C% g: x7 J' D: f4 TThen the position of output pin are fixed for each sub block,and the line drawing will be smooth.$ k7 t. T0 t7 q+ t4 \6 k
Finally,the drc & lvs could be so easy to do . : f) ~3 l! A2 S3 ^* I2 k% L2 i% `But the floorplan must be verified by designer.The thing of re-layout almost have not be happened.