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Sr. ASIC Design Engineer (encoder/decoder)
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公 司:a leading developer of advanced digital imaging solution, t* m$ a( ~% ?, S, P$ d* }7 W2 g
工作地点:上海0 Z; o1 M, S# M f+ H( \
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Position Overview: The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for XX''s future generation multi-media products. 1 `: q9 M! E( F1 f4 p4 V
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主要职责 (70%) : m5 Z) w7 y K6 A9 q% d: j
In-depth knowledge of TV encoder and decoder design. Good understanding of TV system design. 7 _) x9 v' C$ N0 F U% e
Proficiency on digital filter algorithms and hardware implementation.
5 ?1 t) J1 \) D. ?7 T5 L# zDevelopment and verification of complex IP module, integration of the IP module into the Soc devices, top-level design handling, system level testing.
$ C4 K* G g$ v6 W5 NParticipate in the FPGA platform development and lab debugging
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9 K1 e% }* Q+ I/ t' D其他职责 (30%) 6 I$ f' Q, P" u6 }0 D+ |! @1 h
Participate in block level architecture design Assisting embedded FW development.
% C# C( z3 P9 l% s6 _职位要求
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# t! T" g3 i; n4 q1. Strong knowledge of TV technologies, knowledge of image signal process and CCTV system is a plus
$ T% s& k4 c/ F: L$ _5 E3 A* S& _2. Strong knowledge of ASIC design flow. Can define Micro-architecture of the IP module and /or sub-blocks. And able to write detailed engineering specifications. * t' ]1 q: _ I' z1 _
3. Good communication skills, especially in technical writing and reporting;
' J8 p& O% ]2 M7 g4. Self-motivated and ability to excel in a team environment.
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8 G/ b$ n( P I; M" xMSEE/CE with 3+ years of industry experience |
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