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Configuration Management Engineer (Digital IC Design)請進來交流!

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1#
發表於 2011-7-20 12:12:57 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
招聘公司:A famous IC company
: v, ]5 S/ r0 R& t8 k招聘岗位:(Senior) Configuration Management Engineer (Digital IC Design)5 m9 q; s0 A$ p5 ]- c/ t% n% S
工作地点:Shanghai
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岗位描述:
$ H- Q3 ?& |9 k9 oDuties · Do database management/configuration management to support Digital SOC product development for mobile phones · Administrate Clearcase /DesignSync · Administrate change control and bug tracking tools · Do linux/LSF compute farm/ CAD tool first-level support to Digital SOC design team and interface to company IT/CAD organization · Take charge of CAD investment request consolidation
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3 x  i- G" {+ U; g+ j( t, ?( k职位要求:. [3 a. E: x7 `( H& z- t
Requirements · B.Sc. degree or above in Semiconductor, Electronics Engineering areas · 2 years or above experience in Clearcase/DesignSync administration and configuration management in Digital IC Design domain · Good knowledge of digital SOC design is a big plus · Good knowledge of linux, LSF compute farm and script writing (e.g. C shell, Perl) · Good communication skill, will have frequent communication with foreign teams. · Good written and spoken English is mandatory. + j6 R3 G% h. x0 W

& Y- E* A$ m. G! _2 H能者與意者請email研發簡歷與chip123聯絡。
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2#
 樓主| 發表於 2011-7-20 12:15:58 | 只看該作者
招聘公司:A famous IC company' P5 r7 C' w  b
招聘岗位:(Senior) Digital IC Design Engineer (FE Design)
: ?! ^( G6 N$ x" M工作地点:Shanghai
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岗位描述:
2 Q6 C' }+ v: I  m, `$ [! QDuties • IP design and support for digital baseband of cellular phones • Digital SOC design and integration for chips& C7 F# s! i% N; i4 r/ y7 w

4 @& E8 G  N4 ~1 \8 `3 }$ b职位要求:' \3 ^3 \3 K  b+ W" s
Requirements • B.Sc. degree or above in Semiconductor, Electronics Engineering areas • 2 years or above design experience in industry • Good knowledge of design flow including documentation, VHDL/verilog coding, code check, equivalence check, synthesis, timing analysis and RTL simulation. • Good knowledge of AMBA AHB/AXI protocol is preferred. • Good knowledge in UPF/IP-XACT based design flow is a big plus. • Hands on experience in digital IC design EDA tools, such as NCSim/Questasim, Design Compiler, Formality, Primetime etc. • Good communication skill, will have frequent communication with foreign teams. • Good written and spoken English is mandatory.
3#
發表於 2012-4-16 11:36:53 | 只看該作者

Staff Engineer for Digital MAC Design

客户 A famous IC company
; u* v, l# y( w2 s. n! O9 G* q地点 Shangha0 C; N1 \' J0 P' e! H
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职位描述
8 H9 v2 a0 L3 [. G0 o7 [$ n, P% ~We are looking for a person to join a design team to execute a state-of-the-art IC design project in the wireless communication field. Candidate must be familiar with digital IC design flow with a proven record of design and verification of a complex design project that led to successful silicon. Proficiency in Verilog is required.. U2 c9 {  C8 g

. {; ^) ~7 C( Q7 R) z7 z职位要求& c% L) D7 A. a1 }2 O0 e
Requirements:. A  o& Q$ e6 b' U9 Y! L9 e
Experience in the following areas of expertise is desired:6 E8 j% I. f/ h3 S' p/ j
Wireless media access control (MAC) design experience would be highly desirable
  z: x' a3 t4 l8 V, SKnowledge of TCP/IP and DMA Offload Engine design experience will be a plus
( B& j- q/ o' _  U7 l, r; T0 oRTL design, verification, and chip integration
3 `; c, L7 a& N6 d( N+ x* MExperience in the following is beneficial but not necessary requirement:
% ?; n9 G7 V9 q! P8 N8 D! GCommunication systems and RF systems
9 p' y5 ^  r6 D' LFamiliarity with wireless communication systems and standards (802.11b/g/n and WiGig)
# f5 v- T! E: k* J$ wKnowledge of interface protocols such as PCI/PCIe would be a plus4 K- K7 E0 P$ C0 Y2 B: \7 A" T
FPGA design flow, testing, and emulation bringup
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) Y& m, \8 O0 XOther requirements:1 ^# t9 b1 ^+ \0 R4 l( ~
Familiar with design and verification languages, EDA tools and ASIC/SOC design methodology' R  ~9 T" Z8 p5 m5 J  y6 _
Good script language skill, such as Perl, Tcl and Shell; ) y1 \; v5 g1 S
Good written and oral communication skills in English; 1 c( e- h/ F+ G: x" E" |  `1 T
Good Team player
9 j; i6 d: ?# ~& ICandidates must have MSEE degree with at least 5 years of experience
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