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Analog / Mixed Signal Examples
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, C8 L* n3 ?( n1 M% v6 U. \! @7 oBehavioral Models of ADCs3 S4 ]+ b& c, k3 `/ U
\ams\sampling\; sampling_101;
# P$ \( V5 h, Z1 ? Sigma-Delta ADC 1st order modulator $ cd \ams\adc\; dspsdadc2;
5 K3 [( Y: [% i# M% _5 q Sigma-Delta ADC 2nd order modulator $ cd \ams\adc\; dspsdadc3;
L" F( \" Z% Y1 e Sigma-Delta ADC 2nd order modulator discrete time (switched capacitor prototype) $ cd \ams\adc\; dspsdadc4; % Y/ V$ o! V5 f8 H* ]1 n0 {( M: \
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Behavioral RF
6 X6 V, L, t% L' N Measurement of Lowpass Filter Freq Response $ cd feed_fwd_2;
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2 g; O8 n( ]" D5 {4 yPLLs
0 N# q: e7 E* U: X# @1 p VCO with phase noise $ cd
0 T7 q% a3 q" d. c Pll with freq domain instruments $ cd \ams\pll; ; \, d* c+ P+ k7 [% {# w2 g
Pll fractional with analog compensation $ cd \ams\pll; : H/ ^* s& [; f- V) M7 V- `( Q
Pll fractional with digital compensation $ cd \ams\pll;
, w/ @5 t. a7 E7 }/ \0 h Pll optimization (Nonlinear Control Design) $ cd \ams\pll;
% k6 X; v9 U8 \# _4 @ Carrier and Symbol Timing Recovery (NCO->ADC) $ cd \ams\pll; carrier_timing; ' N: l/ X8 U! ~4 ]* J
Carrier and Symbol Timing Recovery (Fractional Delay) $ cd \ams\pll; timing_recovery_1; |
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