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65nm FPGAs

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發表於 2006-12-6 09:34:27 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
New FPGA technology nodes roll out in an orderly sequence.  First, there is the secret "speculation" stage when hush-hush design secrets are locked in the lab.  Then, there is the "technology preview" stage when some limited details are leaked to the world.# s+ V3 B3 k2 ~- Q( l1 z* h# E

! X7 w0 @8 A  o3 b2 B1 V- ZNow, with 65nm, we are at the third stage - "announcement" where the details are divulged, but the devices are not yet available in volume.3 C0 F3 \' w4 b! g

6 c/ w1 V6 N1 HTypically we next get samples and development systems, followed finally by volume production availability - usually at about the time the next round is being announced.
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Today's question asks when you will start looking at 65nm FPGAs for your design projects.
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