初學者一問......有關EPM7128S......VCCINT & VCCIO的問題

jimcooper

請問一下VCCINT & VCCIO還有其對應的GND 這些腳位是做甚麼用的啊??
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* j1 l$ ]& \, Q" C8 R* g( n我已經看我DATASHEET上對這方面的說明,但感覺還是有點不清楚
7 n. G) D. R% ]感覺上VCCINT & VCCIO好像只需要各接一隻腳就可以了,其他相同名稱的腳位都是相通的.....
我的想法正確嗎??
7 N# _. d/ E% E' X5 }0 ?
如果布正確的話....
( M3 b7 ^0 T* K+ X0 X9 r( e, z能麻煩各位幫我做個詳細的解說嗎??

先說聲謝謝~


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) E3 h  v% ^0 F----------以下是DATASHEET針對VCCIO & VCCINT所做的說明------------

! l3 A, D! m+ k# g( j" _7 v. QMultiVolt I/O Interface
  R7 X7 [3 ?) w1 b2 `$ V
3 X; E' {  |$ s  p2 LMAX 7000 devices—except 44-pin devices—support the MultiVolt I/O
# d2 O) f) j/ z% M* linterface feature, which allows MAX 7000 devices to interface with
: s$ q- o" i# l7 q3 ]systems that have differing supply voltages. The 5.0-V devices in all
packages can be set for 3.3-V or 5.0-V I/O pin operation. These devices
, ^+ T7 }# F& S% Q/ f4 N' M2 E6 ]2 phave one set of VCC pins for internal operation and input buffers
(VCCINT), and another set for I/O output drivers (VCCIO).
% Q4 {+ r. f1 F  r8 PThe VCCINT pins must always be connected to a 5.0-V power supply.
1 p+ N$ O2 k9 J0 x- {With a 5.0-V VCCINT level, input voltage thresholds are at TTL levels, and
! U/ y: L( g, M7 `) M5 Fare therefore compatible with both 3.3-V and 5.0-V inputs.
: Y0 e7 b; k( J3 g- s$ I* J- tThe VCCIO pins can be connected to either a 3.3-V or a 5.0-V power
" K! d4 s+ d( C# vsupply, depending on the output requirements. When the VCCIO pins are
* [& T4 g: m4 R7 O8 Y' iconnected to a 5.0-V supply, the output levels are compatible with 5.0-V
- Y$ Z7 F: N( k7 @+ }6 N/ l2 F1 Tsystems. When VCCIO is connected to a 3.3-V supply, the output high is
3.3 V and is therefore compatible with 3.3-V or 5.0-V systems. Devices
% c/ g8 W" y& q$ |0 ^operating with VCCIO levels lower than 4.75 V incur a nominally greater
4 Y( ^  {0 B' \" @2 ]  E; Rtiming delay of tOD2 instead of tOD1.

. U' J6 w  m1 K9 c' g' L- H: [+ r[ 本帖最後由 jimcooper 於 2008-11-9 04:21 PM 編輯 ]

sieg70

Vccint跟Vccio, 以及Ground"每根"都要接

addn

您好
VCCINT接5v,則當io pin為輸入時,可接受3.3v,5v的輸入準位
7 k) }; `+ @6 P# y9 l9 kVCCIO接5v/3.3v,則當io pin為輸出時,輸出準位就為5v/3.3v準為位
! |1 i0 \5 V) A5 W& s3 [' R  P9 `
[ 本帖最後由 addn 於 2008-11-10 10:16 AM 編輯 ]

ssejack1

VCCIO 在有些產品有分 block, 當不同 IO 電壓要使用在同一顆 IC 時可以劃分在不同的 block 就可同時使用不同之IO 準位; VCCINT 為 IC core 電壓,與 user 較沒直接關係,只要依 spec. 供給就沒有問題!
須注意的是 VCCINT 與 VCCIO 有點影響,越低的 VCCINT 製程越新, delay / speed 多比較快,壞處是 VCCIO 會較低;
; q0 `* y% N$ D% j  F比如 VCCINT = 3.3V者, VCCIO 一般 3.3/5.0 均可,但 VCCINT = 2.5者 VCCIO 或許無法始用 5.0 v 了!
2 l# Z( z4 Q1 Q8 u參考參考!