Item
2 Z" q) ^) ?& P3 P2 e | SH77722 (SH-NaviJ2) Specifications4 Y% e/ V& r8 K' T9 \
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Type name
0 W0 p! {& P( {+ {* t1 l | R8A77722DA01BGV8 }$ {8 l1 c- s7 P- n
| R8A77722DA02BGV3 P, J2 H. v3 a# l K- a
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Power supply voltage
7 k8 H; e# m+ |/ [ | 1.15 to 1.3 V (internal),
2 B6 u. Y3 w: M1 Q3.3 V and 1.8 V (external)
+ M' N9 j* ~1 E2 C, s$ ^ | 1.2 to 1.35 V (internal),
n, F3 O, s% y3 W3.3 V and 1.8 V (external)
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Maximum operating frequency, p' R" c+ J! q% |
| 336 MHz
9 G4 v% V% n' w5 Q) K ] | 400 MHz
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Processing performance1 j' k* b5 y, Z/ I0 y4 g$ r
| 600MIPS, 2.3GFLOPS0 V, M( E3 f+ v; P. R9 V
| 720MIPS, 2.8GFLOPS
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CPU core) ]3 i. r: L1 T1 a* b+ t
| SH-4A core% D0 P. r( H& f) x$ A9 L
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On-chip RAM
$ V/ _* G K) Z/ l3 C! y | ILRAM: 16 Kbytes3 @ J' y' f0 n: i, _
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Cache memory
3 G/ \: }6 g* \$ |7 s( F* A | 4-way set associative type with separate 32 Kbytes for instructions and 32 Kbytes for data
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External memory; Y; |2 H; ?5 B& a
| DDR2-SDRAM (data transfer rate: 336 MHz) directly connectable to dedicated DDR2 bus6 b$ W7 a" N4 a3 a# A/ v7 p9 b) ]
| DDR2-SDRAM (data transfer rate: 266 MHz) directly connectable to dedicated DDR2 bus
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SRAM or ROM directly connected to extension bus3 k0 x2 y. i& w+ I# M$ H; d$ b
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Extension bus
) j5 l+ d- p+ N% ?+ z | Address space: 64 Mbytes × 3. |2 ^; @( j2 u: t
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Main on-chip peripheral functions
; t9 w" @9 L' B, F, q& ^ | Renesas Graphics processor(2D/3D)
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Display control: outputs for two screens (digital RGB and LVDS)
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Video input interface
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SD card host interface × 2 channels _1 Y! }. \$ D
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USB 2.0 host/function interface
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FM multiplex decoder
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Controller area network (RCAN) interface × 2 channels
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MOST interface module. L" [9 H3 I$ m' x- M1 x" Y
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Various audio interfaces × 4 channels
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Dedicated DMAC × 26 channels
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I2C bus interface × 2 channels
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Serial communication interface (SCIF) × 8 channels
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Remote control interface × 1 channel
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A/D converter (10-bit) × 4 channels! ]2 [: {8 \7 J& W& ^! K) f
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Timer × 9 channels" I* O w% [: J: Q' G
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On-chip debugging function
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Interrupt controller (INTC)0 F! m) Q4 I0 `
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Clock pulse generator (CPG): built-in PLL frequency multiplier$ R+ x- \' \' O, A
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Power-down modes m, ]9 H. \+ Z- k( A" i" T
| Sleep mode* |* ~" R( Q7 \( G) R" j* J
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Module standby mode( X! v( Z% T7 y# U1 d& }! O6 a) a
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DDR-SDRAM power supply backup mode8 A, o N9 O! m4 c0 w$ ?
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Package( j. ~8 u5 v. U0 A2 }5 J f
| 449-pin BGA (21 mm × 21 mm)- |: |6 z. g4 b6 g
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