Sansen讀書會...

賴永諭

slide 154
A gain of 1000 is expected.
=>應該是 A gain of 100 is expected.

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Slide1524:
8 q4 q4 v" w% g5 l- {$ uSlide 0128 Vout/ic=1/2gm3ro1

, _- M" p' ?. s! w+ l補充內容 (2019-1-8 11:06 AM):
Slide1524: iout/ic=1/2gm3ro1
: Z* r/ G# H% V4 P# z. d
. z; |# y3 G9 \  `( ?0 w! ]  A' h補充內容 (2019-1-8 11:08 AM):
Slide1525: iout/Vinc=1/RB*1/2gm3ro1

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Slide 1312:
& V3 [1 V- I# W) TInput shunt: Current mixing輸入電阻變小
Input series: Voltage mixing輸入電阻變大
Output shunt: Voltage sampling輸出電阻變小
Output series: Current sampling輸出電阻變大

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slide 0731
: ?! g5 D- Y6 U+ d, X  x5 X, `0 G需要4各bias 點~

5 [* s$ {: L! N! K, J/ yside 0732
只需要3各bias 點~
; d% B  o! }7 M7 o5 }8 WM2 D 端的極點比slide更遠

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slide 097
It is the output gm3 divided by the load capacitance CL. It is normally set at two to three times the GBW
depending on the phase margin required.
- x( \& L" E. s2 z: Z+ j& N0 d=> 更正
1 A# D: c$ y7 k2 c$ `2 B& OIt is the output gm2 divided by the load capacitance CL. It is normally set at two to three times the GBW
6 n0 O* S0 p" }. B& X# }3 \2 E' G7 Tdepending on the phase margin required.

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賴永諭 發表於 2010-7-13 03:49 PM
回復 32# tuza2000

上面說明有誤～
! j" A) S. Z" w8 W+ _5 H實際上左邊diode connect pmos gate 與右邊M6相接

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Slide 0346: Input M2 base, OUT M3 base(Series- Series feedback)
Current sampling, Voltage mixing; 增加輸出電阻, 減少輸入電阻
$ G7 R8 Y5 ?; }所以Rm增加beta

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Slide 2264: gm max=1/2(W*C1*C1/C3)
* p' n& V- {, z* A' ^/ F1 QRef: silde2219
Start-up of oscillation 可知

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Slide 025
Noise will be explain in detail in Chapter 4.

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slide 0444
Noise of a current mirror with series R:
前面的R小於1/gm時, 為什麼iout noise 隨的電阻增加而變大?!
! y# Z9 w+ Y4 ^: P/ q還是只是示意圖來說明, 此時的電晶體noise 是大於電阻的noise~~~
3 f' g+ q7 s. D0 g/ `3 d謝謝~~幫忙回附一下
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slide 0513
分享一下~~這張Gain bandwidth說明如下
1. 當接成回授時beta=1, 其-3dB 點的頻率就是loop gain =1 的頻率。
2. DC gain*-3dB bandwidth=GBW。
3. 當接成回授時, ex: beta=1/2時, 其DC gain=1/beta; -3dB bandwidth=GBW*beta, 只代表在這個-3dB bandwidth頻率下, gain 最多掉3dB, 並不是在這個bandwidth 下 所有頻率的gain 都是1/beta；只有DC gain=1/beta。

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slide 0513
分享一下~~這張Gain bandwidth說明如下
( ?8 I# A  P- G# [1. 當接成回授時beta=1, 其-3dB 點的頻率就是loop gain =1 的頻率。
% D; p  I' K; R1 M( }2. DC gain*-3dB bandwidth=GBW。
3. 當接成回授時, ex: beta=1/2時, 其DC gain=1/beta; -3dB bandwidth=GBW*beta, 只代表在這個-3dB bandwidth頻率下, gain 最多掉3dB, 並不是在這個bandwidth 下 所有頻率的gain 都是1/beta；只有DC gain=1/beta。

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slide 2222
Verify that RB>1/(RsC3^2Ws^2)
; R$ n. O, j, c4 m
8 z6 _0 u( b7 I; X=>說明如下, cmos 負電阻~gmA/Ws^1C1C2
8 X: e+ L, M& v4 f/ N用RB 來biasing 應該要大於1/gmA 電阻
所以RB應該大於1/(RsC1^2Ws^2)
3 w+ u: T0 J' Y  ]! E

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slide 2222
Verify that RB>1/(RsC3^2Ws^2)
+ c: m1 n4 }  t( T
8 _4 c. l8 R/ a& q' b=>說明如下, cmos 負電阻~gmA/Ws^1C1C2
用RB 來biasing 應該要大於1/gmA 電阻
  a# G( `6 j& E4 ~4 z' L6 V所以RB應該大於1/(RsC1^2Ws^2)

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slide 2222
Verify that RB>1/(RsC3^2Ws^2)

=>說明如下, cmos 負電阻~gmA/Ws^1C1C2
, a1 _& l( h0 i用RB 來biasing 應該要大於1/gmA 電阻
所以RB應該大於1/(RsC1^2Ws^2)

賴永諭

slide 2222
; o. O8 @' x) W+ {+ |5 iVerify that RB>1/(RsC3^2Ws^2)

=>說明如下, cmos 負電阻~gmA/Ws^1C1C2
用RB 來biasing 應該要大於1/gmA 電阻
所以RB應該大於1/(RsC1^2Ws^2)

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slide 2264 Calculation of gmA

4 ^% l6 C# A3 ]! X& jgmmax 應該是C1WC1/2C3
# _; v& D; W8 s4 Q3 p5 p$ W/ j1 F
; R$ C* v% r1 |=>ther/2=gmax/(Ceff x ws)^2可推算出來

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賴永諭 發表於 2024-3-4 04:01 PM
$ z. U9 M7 J4 \. r9 |) a0 p! m6 Jslide 2222
4 O: f( G; i1 @; {3 ?Verify that RB>1/(RsC3^2Ws^2)

gmA~ 4RsCL^2Ws^2
and 4WsCL^2/QCS
) `2 P/ p! W- M

! S- K  C+ Q" W2 i! N; q

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RIP
7 l( C( t6 _( n1 j5 x6 c. e+ H
In Memoriam : Willy Sansen (1943-2024)

https://bbs.eetop.cn/thread-968254-1-1.html

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Design of Crystal Oscillators
slide 2255補充資料：Two stage ring oscillator analysis
$ s/ [  B1 {" i
https://drive.google.com/file/d/ ... Hq/view?usp=sharing
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