Xilinx Spartan-3 DCM

syuan08

我想要產生CLK0,90,180,270不知道是程式少打還是哪邊出了問題!

想請問大家有沒有寫過相似的程式?


# o" f, U0 ?5 X( C% |0 V3 Dmodule dcm1(clk,rst,clk0,clk90,clk180,clk270,locked,clock);

input clk;
input rst;
; k* n7 V0 y3 t! E* e% v
/ {6 N4 X, U% Z$ _' S, O: m: }4 qoutput clk0;
8 ~3 `2 {! v  @) Voutput clk90;
output clk180;
0 ?$ i3 c6 Q" L( R8 t7 b0 J* [output clk270;
output locked;
" r2 k9 B* N; f4 k& ]# M/ S; ?9 }output clock;
+ P' O/ ?5 V+ H& X. r: o
+ U3 r+ l# K4 Z/ l. [, l& `
  d5 Z: x6 t, e% C$ Mwire clk0;
wire clk90;
& M. V& R3 T. n$ C8 Wwire clk180;
wire clk270;
wire locked;
% {# o* r2 ?" F/ ~. M
( q7 d/ h7 p3 W0 q. ]dcmm instance_name (
3 F, A) p2 Q0 s: O! s4 C3 T- N    .CLKIN_IN(clock),
    .RST_IN(rst),
    .CLKIN_IBUFG_OUT(),
% _+ x5 Q8 F  G0 L0 ^+ ?/ R    .CLK0_OUT(clk0),
    .CLK90_OUT(clk90),
3 u2 i! R$ ?4 z% u    .CLK180_OUT(clk180),
5 W. X, X1 @7 D* K$ M+ l    .CLK270_OUT(clk270),
    .LOCKED_OUT(locked)
    );

, {& l6 I' k2 h, ?% u5 E2 qendmodule

4 {5 _! \& V* @# @4 P+ \2 K  j
) @/ K3 m; q7 x, P1 N
" K# v2 J- c" g7 K腳位:

NET "clk" LOC = T9;
NET "clk0" LOC = P8;
/ O' x6 j. t) W7 l) xNET "clk90" LOC = T10;
NET "clk180" LOC = R11;
NET "clk270" LOC = R12;
NET "locked" LOC = R14;
NET "rst" LOC = R9;

sieg70

請問有看到啥咪錯誤訊息? 還是有怎樣的問題? @@