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Sr Analog Design Engineer. E# J% s+ Z- x( B
5 W. l9 |( c( M" B公 司:A famous IC company1 g; R1 ^. T( \5 q
工作地点:上海3 f+ y; E& V" V3 s: s, w) L
& J. Z3 y) Q( l4 i7 LResponsibilities: 8 a" @' ^ l' J. ^1 F" T. l
• Implement critical analog circuitries, such as charge pump, bandgap, reference voltage/current, ADC/DAC etc., for memory operation* ]$ d4 l. c! @# z( ]
• Perform transistor level simulations for functionality, performance and optimization - r3 D4 L" s& z7 U( ?
• Perform block level and full chip level simulations using mixed-signal simulators
% L- V2 m7 |0 J+ ^, @• Define, design and verify architecture for embedded non-volatile memories
P i/ A1 {* V" d+ {• I/O design experience a plus , \5 e+ H$ v1 x& P$ I0 u! O+ U
• Other duties as and when required.
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; J# d) `! C5 f* KMandatory Skills:
4 V2 J. u9 _% s' P/ g• Must be good at problem solving
/ t+ F3 P4 e5 a! z1 N5 d* X8 ^• Must have the ability to communicate effectively with different levels of employees/customers 4 _, W8 A1 U4 E1 Q0 p
• Knowledge and ability to use computer tools such as HSPICE, SPECTRE, digital simulation(NC-verilog), mixed-signal simulator, static timing analysis and test generation + O+ @3 [3 a- v1 ], f6 R' _
• Knowledge of layout verification tools and debugging techniques $ B. G$ Z: v6 O( f
• Some knowledge of digital RTL design and logic synthesis preferred ! W& w; [/ ~0 Y
! x$ Y4 Y( Y8 }/ r- V" F% h& WEducation:Bachelor Degree or higher preferred - ~/ K( C6 B% p0 N- `% x/ O
Experience:Minimum of 4 year’s experience in R&D center in Semiconductor field ' n" {3 ~9 T* U$ a0 T) E, V) p" \
Position:Regular
5 \$ b* O4 h8 B( F1 X& J. @Shiftay |
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