In your verification flow, the primary EDA vendor/tool your team is using

amatom

Staff Hardware Based Design and Verification Engineering Lead
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; {2 X% }8 o% q" }公      司：One world top EDA company
工作地点：上海

7 D, R  n  l, L6 q- iPosition Description:  
1. The Staff Hardware Verification Engineering Lead will be in charge of a team of field engineers to support advanced hardware based verification flow integration engagements with Cadence customers and provide easy-to-adopt packages and workshops to xx  field application engineers and customers alike.
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2. He/she will focus on the technical aspects of the following hardware verification solutions for customer engagements as well as creating demos/workshops to train field AE and customers:
(1) xx  Palladium HW Acceleration Platforms
: J( h: K: B& E, s: O( g(2) xx Acceleratable Verification IP portfolio
+ U, N+ I4 d  j: o- v(3) CVA product integration with other xx products such as Incisive Simulation and RTL Compiler for power analysis
(4) HW/SW Co-verification solutions for SoC designs

amatom

Position Requirements:  
4 \& o8 f8 Z  n7 X5 k! T( F1. Experience:  
. l  Q" D- ~! M) i- Minimum experience required: 10 years  
- Expertise in RTL top-down design and verification methodology automation are required. This includes full hands on knowledge of writing and debugging Verilog, VHDL and SystemVerilog based D&V environments.
- We would also like the candidate to have good knowledge of SoC design principles, embedded software development and HW/SW codesign and coverification.
- Knowledge of UNIX, C/C++, other scripting programming languages ( Perl, TCL…) is highly desired
) [- @' \  S0 n/ d4 n3 B, A- Strong verbal and written communication skills in English are required  
: K( P/ k% b, M- HW acceleration or In-Circuit Emulation or FPGA prototyping experience is a must
- Hardware verification, including knowledge of HDL simulators and debugging simulations
- Hands on experience with using design and verification languages like SystemC, SystemVerilog (IEEE 1800) and VHDL is a must.
- Knowledge of embedded systems and software development for SoCs is a plus
2. Education:  
Ideally the person should possess the BS/BE level of understanding of CS or EE Engineering concepts  
5 ?0 r$ @) }' ]: a* Z- Minimum Education Required: education level of BS with 10+ years experience (or MS with 7+ or more years experience).
" t- f, Z; ?0 T0 S$ b3. Travel of 30% of the time should be expected.