FPGA-Based Prototyping on your current project

ranica

Hardware Applications Engineer – Cores
/ \2 G. f+ h0 W9 ]2 Y7 c
$ \1 q% W" u8 u8 H公      司：A famous IC company
5 L8 h- N" G7 n/ ^+ Q3 |工作地点：上海

4 Q) `# h# `2 c( cJob Requirements：
Qualifications
( B- h& d7 ^$ {0 u+ IGood university degree, in Computer Science or Electronics Engineering ideally, although other science graduates would be considered if they have relevant experience.
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5 Y) l. X  n/ ]$ e, p  m- |: I4 lExperience
/ `0 H. m8 v$ {5 C/ u8 _6 l   Minimum of 3 years industrial experience
+ |& k% @0 }/ r! i- l4 L& y   Strong understanding of XX processors
   Experience or knowledge of FPGA or ASIC design, simulation and/or verification techniques, including RTL coding and simulation, in Verilog or VHDL
  X, C8 r. m7 `& k  E  D- F   Understanding of FPGA or ASIC implementation flows (synthesis, scan insertion, layout)
   A good understanding of the interaction between software and hardware
, m+ M1 y1 ?) o/ Y) ^! ?   Demonstrable experience of problem solving and debug skills
   Experience of interacting with colleagues outside of China

ranica

Desirable
) q& B; u5 I$ J. p  {* _* j   Knowledge of XX architecture and AMBA protocol
) U& c3 O: _) w4 Q3 R" ]% v5 p& U   C/C++, assembler coding or other programming skills.
- f. w) Q! P! L% v   Experience in integrating SoC peripherals

2 v) {: Z2 |! B( RPersonal Requirements
   Must be self-motivated, self-managing, responsible and proactive
$ y. {* L1 y) i$ e; X& f   Must have excellent written and verbal communication skills with both colleagues and customers, including good written and spoken English
1 k% H) C( [0 ^5 D& d, V5 w   Must be proactive in obtaining engineering or management input, in order to complete project and internal tasks in a timely and accurate manner
. _6 Q! |4 w# d* Y, {6 n   Must have the desire and ability to solve problems quickly
6 h% a6 r0 o6 j2 E   Must be enthusiastic and well driven
3 _  q$ N0 m( n- I( i: N8 i   Must be able to schedule own workload and plan tasks – based on both internal and customer requirements.  
   Must have good inter-personal skills, and be able to work well within a team; especially when under pressure
   Must be willing to be flexible and accept new challenges.
0 E7 ~5 U, G5 e7 J+ t7 T$ c   Must be able to travel on a regular basis, both to give customer training and also for internal business reasons.

ranica

Senior Digital Design Engineer

公      司：A famous European IC company
4 B7 x0 V; f" K0 p- u1 D, W工作地点：上海
* v# s# j. y% J5 H  T3 @5 l
Job description  
- define system partitioning of s/c circuits and system  
( J& R: s& q- l0 c- define HW/SW co-partitioning  
# e' |3 Z! s4 y9 s$ R- provide technical feasibilities based on system simulation and/or FPGA based demonstrator  
% a* t& t; l7 N( A- propose new technical solutions on s/c and system level  
- design digital part of mixed signal (smart power) ASICs  
) ]( C5 Q) e* f: M8 J- close cooperation and interaction with international teams  
3 h! m4 k* P1 ^" I9 I" c- coach junior engineers  
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Required knowledge competencies and attributes  
- master degree in microelectronic circuits or systems, Communications, Computer Engineering (or equivalent)
- > 5ys experience in digital design  
- good understanding of ASIC mixed signal flow (Cadence based)  
- strong background in HDL coding, verification and toplevel integration  
5 \3 l3 Z' h) I- good understanding of communication interfaces used in Automotive (SPI, CAN, LIN, Flexray)  
- experience in FPGA development  
- very good communication skills (written, oral)  
- self motivated and high level of flexibility  
- foreign languages: English, German (not a must)