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回復 4# 的帖子
1. Using technology file to create a library" {3 }9 i; U0 ]9 D
2. Do stream in with cell type definition file. Specify some special layers' number. IE : Boundary Layer is 63.6 w( ~# g) g2 B8 U7 x- }! R
3. Open new created library, and create some metal blockage if need.+ Q7 ^& w7 y* i: Z7 R
4. Do smash if need.( T9 N% ]6 h, t+ V; m8 b& M
5. remove some unnecessary extension txst. IE VDD ---> VDD( ?: n$ K) T B
6. Define power,ground as well as in/out port
6 f7 V$ N: _9 C/ F- M7.Extract Blockage,Pin and Via by using command auExtractBlockagePinVia.- s6 r* m7 J9 I0 E5 X
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The processes listed above is my method to do data preparation. Maybe someone know other best way for this issue. Please share it with us.! i' U( X" p) I6 Z6 r5 ~
-->我要怎麼做才可以把 ANALOG中 重複性較高的部份交給 APR去做?1 l$ q! L% g# a7 @1 R% f
I don't understand your question. Do you want APR toll to place and route your analog block? It is a bad idea if your answer is yes. |
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發表於 2008-3-3 13:39:36
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