MIPS Unveils Industry's First Multi-threaded, Multiprocessor IP Core

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MIPS Technologies Unveils Industry's First Multi-threaded, Multiprocessor IP Core for the Embedded Market

2 c) c0 F) ]  J! IMIPS32(R) 1004K(TM) Coherent Processing System Offers Superior Performance through Multi-threading
( B2 N' s- N3 U- U8 k0 _MOUNTAIN VIEW, Calif., April 1, 2008 /PRNewswire-FirstCall/ -- MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard architectures, processors and analog IP for digital consumer, home networking, wireless, communications and business applications, today introduced the MIPS32(R) 1004K(TM) coherent processing system-the industry's first embedded multi-threaded, multi-processor licensable IP core. The new multi-core offering provides among the best performance efficiency and configurability in a multi-processing system -- up to four single- or multi-threaded processors integrated with advanced system coherency. MIPS Technologies' multi-core debut marks yet another performance milestone for the company, following last year's launch of the high-performance MIPS32(R) 74K(TM) core-the industry's first single-threaded processor core to achieve frequencies greater than 1GHz.

1 n% D- x* y6 P"There is growing demand for processor performance in embedded applications," said Christian Heidarson, principal analyst for the semiconductor group of technology advisory firm Gartner. "Traditional frequency scaling is limited by power constraints, so additional performance must be achieved through parallelism. For highest efficiency, combining multi- threading and coherent multi-core has great potential."
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Unlike other embedded IP offerings, MIPS Technologies has a unique performance advantage inherent in its single core processors. MIPS has optimized single core performance by maximizing single pipeline efficiency via multi-threading in the MIPS32(R) 34K(TM) core, as well as achieving increased processor headroom and generating 1GHz+ frequencies with a superscalar, out- of-order pipeline in its 74K(TM) core. For many high-volume embedded applications, the need for significantly higher performance levels is now driving a move to coherent multi-core implementations that minimize system resources and maximize SoC performance on mainstream silicon processes and clock speeds. The 1004K(TM) core optimizes CPU performance on a shared memory system, enabling multiple functions and applications to be implemented in a single product-all running concurrently and responsively under symmetric multiprocessing (SMP)-based operating systems.
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"With our multi-core solution, MIPS Technologies offers designers two paths to higher performance for next-generation embedded applications -- the 74K core for the fastest, single-threaded application, or the 1004K core for coherent multiprocessing scalable to even higher levels of performance," said John Derrick, president and general manager of the Processor Business Group, MIPS Technologies. "MIPS Technologies is now uniquely positioned to offer customers a multi-threaded coherent multiprocessing solution, the industry's highest performance cores with advanced cache coherency and multiprocessing support, and one of the richest ecosystems for products in the digital living room and beyond."
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The 1004K coherent processing system helps lower SoC development costs, since for many applications, fewer processors are needed than with other multi-processor solutions. Multi-threading in each CPU provides significant performance gains over single-threaded multiprocessor offerings. A wide array of key vertical applications, including digital home entertainment, home networking and office automation, are strongly poised to benefit from coherent multi-processing using multi-threading. In addition, the 1004K core offers a broad array of options for increased design flexibility. Designers can add CPUs to scale performance for their specific application requirements. The multi-core Coherence Manager (CM), the foundation block for intelligent system coherency, is configurable for one to four single- or multi-threaded cores with an I/O Coherence Unit (IOCU) that provides optional hardware coherence for I/O peripherals to remove the overhead of implementing this function in software.
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Additionally, the 1004K core provides a highly scalable performance migration path for the popular MIPS32(R) 24K(R) and 34K(TM) core families. Since the 1004K core is MIPS32-compliant, designers can leverage an extensive base of existing software. Two initial versions of the 1004K core family will be available this quarter: the MIPS32 1004Kc(TM), which provides a coherent processing system using base integer cores, and the MIPS32 1004Kf(TM), which uses integer cores plus floating point units.

Processor Business Group

MIPS Technologies provides the number one processor architecture across a wide array of high-growth markets, including digital television, broadband access, WiFi, cable set-top boxes, DVD recorders, HD DVDs, and VoIP. The company offers the most comprehensive line of processor cores available for the embedded market-ranging from high-performance to low power products with unique efficiencies and cost advantages for next-generation SoC designs. MIPS Technologies licenses its intellectual property to leading semiconductor companies, ASIC developers and system OEMs. As an industry-standard architecture for more than two decades, MIPS Technologies provides the most extensive range of scalable microprocessors in standard, custom, semi-custom and application-specific products worldwide. The MIPS(R) Ecosystem provides a robust infrastructure of world-class standard tools, software suites and services to help ensure rapid, reliable, high-quality and cost-effective SoC development.