The MathWorks Announces EDA Simulator Link DS for Synopsys VCS MX& D' T% R: a$ F: t7 E
| 3/24/2008
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Synopsys to Acquire Synplicity
/ L, V% K* |! G7 a7 T2 o" m | 3/21/2008
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Synopsys IC Compiler Routing Qualifies for TSMC's 45-nm Process2 M: g2 i, g8 Y, l$ `( A+ d" t
| 3/17/2008
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Synopsys Launches HSpice Integrator Program With 25 Founding Members
, N2 U$ |( P: k. T6 p' N | 3/11/2008
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Synopsys Announces Multi-Core Initiative to Accelerate Design Time-to-Results2 B7 Z0 e1 H0 G* E9 j, {
| 3/10/2008
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Synopsys HSpice Delivers New Technology to Accelerate Circuit Simulation Performance
4 c8 t) f& ^7 \! t7 Z. h. p | 3/10/2008
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Synopsys Enters Embedded Memory Market with Highly Differentiated IP
( W7 E" G+ N I4 E | 3/6/2008+ q9 ~1 m/ S# m0 _9 b6 U$ X
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PrimeYield LCC Enables Litho-Clean Tapeout for LG Electronics HDTV Application Chipset9 q0 B. g/ B& j, M% u* L0 y; }
| 3/4/2008
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Synopsys and SMIC Deliver Enhanced 90-nm Reference Flow to Reduce IC Design and Test Costs
& \/ M, U/ H1 q$ F: n0 J | 2/27/2008
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Synopsys Introduces Concurrent Hierarchical Design System with Latest IC Compiler Release
2 J) B; o+ j+ S8 A& t# y | 2/27/2008* v+ v/ Q: Y3 w8 V! t
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Synopsys Unveils Proteus Pipeline Technology
$ w. z. G% o# e& ~4 ]! a+ | | 2/27/2008
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Synopsys Introduces the Eclipse Low Power Solution0 ?8 @' `. E y% W! }' v
| 2/25/2008
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Radiospire Standardizes on Synopsys VCS and VMM Methodology for Next-Generation AirHook Chipset Designs3 s2 P- `6 Z! v) M6 U
| 2/15/2008) u8 a& x" ^9 x" M/ d2 [0 F& W$ [
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Synopsys TetraMAX ATPG Solution Boosts Structural Test Quality at STMicroelectronics
% }8 o: }8 S5 C) h8 X% c3 @2 @) x | 2/15/2008
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LG Electronics Increases Quality of HDTV Chip Using Synopsys Test Solution: N- D5 g. M0 \ s$ r0 p+ D. M
| 2/13/2008" O/ \% T" f" z! p
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Synopsys Expands USB IP Portfolio with New IP for Link Power Management and High Speed Inter-Chip Standards/ S$ D' C" M& t: ?: {& b7 c
| 2/4/20086 F. e T4 Z9 W. O3 T7 p5 Z# L
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Synopsys' DesignWare DDR Protocol Controller IP Integrated Into Arteris' Network-On-Chip Interconnect Solution0 L+ C0 U' G$ B. H! `6 @
| 1/30/2008 F. |0 b& [2 p1 K6 o
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Synopsys and Acceleware Deliver Hardware Accelerated Solution for Design of Optoelectronic Devices, T7 N7 c9 ~( h
| 1/22/2008* c2 E, L3 r& K2 u: B
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Magma, Mentor Graphics and Synopsys Deliver Unified Power Format-Based Products z( V9 ^5 [8 o( w
| 1/21/2008
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Synopsys IC Compiler Used by Matsushita for First 45-nm SOC Design Tapeout, Y1 b8 j; \7 B. h7 y
| 1/21/20089 b0 y1 g+ {& L4 u- n. e, H
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STARC Adopts Synopsys PrimeTime VX as the Variation-Aware Timing Tool for Its STARCAD-CEL Methodology
3 K( z1 g: N k7 F- [5 e | 1/14/2008
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Silicon Canvas Laker Environment Integrates with Synopsys Hercules Physical Verification Suite. @+ f* t1 J: i k
| 1/8/2008+ ~8 `6 z% _4 H* Y& Y) _2 Y8 X% @
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iC-Haus Converts to Synopsys HSIM-XA for Its Zero-Defect Mixed-Signal Chips# \) [- I8 y' |3 T- e# b+ v
| 1/7/2008
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