The wholechip floorplan is very important before you start the layout. 0 x6 L8 E, i& s- Z* iThen the position of output pin are fixed for each sub block,and the line drawing will be smooth.& p( X7 T$ v* n
Finally,the drc & lvs could be so easy to do . " {3 R6 P- C7 K* o+ v4 ~5 `7 N1 Q- VBut the floorplan must be verified by designer.The thing of re-layout almost have not be happened.