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Sr. ASIC Design Engineer (encoder/decoder)
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& E" Y& p/ x( [7 Z3 \! {% B9 o公 司:a leading developer of advanced digital imaging solution
0 d3 {* L/ c0 Y, n" V+ E) l工作地点:上海0 o( q: l m' t0 f3 Y; H
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Position Overview: The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for XX''s future generation multi-media products. . P1 ^/ ~7 ?6 C P& E
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主要职责 (70%) 7 r: Z$ |9 P7 t e) S5 m: c
In-depth knowledge of TV encoder and decoder design. Good understanding of TV system design.
- x! m5 e3 `5 {: JProficiency on digital filter algorithms and hardware implementation. - s2 ]! `6 C, T. v# K
Development and verification of complex IP module, integration of the IP module into the Soc devices, top-level design handling, system level testing. / n& p8 P7 r8 n# f
Participate in the FPGA platform development and lab debugging
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8 W8 c7 g, X. G其他职责 (30%) 7 C! H4 Z: G0 ` a4 E0 q+ M
Participate in block level architecture design Assisting embedded FW development.0 \( c* q; U2 ^& D
职位要求
4 B a! E0 a; E: ]# S/ L9 v; D9 A+ I. N岗位资格
: A2 i7 f5 g( w3 b经验/技能
/ J8 d: U/ `, I9 x) E1. Strong knowledge of TV technologies, knowledge of image signal process and CCTV system is a plus
( k. {* L+ ?, G, Q8 s) }2. Strong knowledge of ASIC design flow. Can define Micro-architecture of the IP module and /or sub-blocks. And able to write detailed engineering specifications.
" p6 g! B7 H7 o1 _3. Good communication skills, especially in technical writing and reporting;
6 J% h% s& H; ~, D! p! B4. Self-motivated and ability to excel in a team environment. k( U& z- ^ y: p
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教育 6 Q; M% `' n, U% `; B+ I
MSEE/CE with 3+ years of industry experience |
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