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積體電路佈局工程師核心課程養成班的必要核心課程?

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發表於 2012-1-18 15:14:44 | 顯示全部樓層 |閱讀模式
根據經濟部工業局智慧電子學院推動辦公室指出:
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發表於 2012-2-16 17:34:59 | 顯示全部樓層
招聘公司:one famous IC company0 T9 M# O5 r- r/ u( X
招聘岗位:Sr. Layout Engineer) _' u: q: I9 n6 ~- v; E9 }
工作地点:Shanghai
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Job Requirements: -Work with circuit designers to build physical design floor-plan; -Complete the physical layout design with the constraints of circuit design requirements; -Verify the physical layout design to meet both circuit design requirements and process requirements; -Use the advanced technologies to improve layout design quality and efficiency. ) {6 U6 v# L/ D! B3 C& y8 E

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Qualifications: -College degree (or above) in Electrical Engineering or other related engineering field; -At least 6 years experience in layout design field with rich tapeout experience; -Good understanding of basic electronic principles dealing with circuit and layout design; -Familiar with IC layout methodologies, flows and CAD tools such as Cadence virtuoso layout, Caliber physical verification; -Prefer experienced in PLL and IO design -Patient, A good team player, Good communication skills; -Can communicate with both written and spoken English.
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