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發表於 2011-7-28 11:45:17
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招聘公司:A famous IC company6 M1 o% Z' H5 e! g) l7 c
招聘岗位:Analog Design Engineers1 O" e3 y' m) ]& s/ r
工作地点:shanghai& ^& U: [; ^: a( @6 Q/ [' S$ ^
- _2 c. Y+ L9 D5 O, S1 ?8 N岗位描述:7 q1 D/ Z u. A
Research, definition, design, simulation, layout supervision, characterization and release to production of high-performance state of the art BICMOS, video integrated circuits. The integrated circuits will typically include the following blocks:. X7 V, i# L, B k$ Z6 I1 u/ P/ G; B6 ^
3 a; z- I' B, D5 w* s2 dVideo Amplifiers & M. e* f( O8 U- _4 ?4 y, G$ a
DC-to-DC converters, LDOs, PORs
2 P4 N, w% t2 c( K5 M2 C: n& {Interface Circuits –SPI, I2C, LVDS, …
; B L" x; g4 B& T p& L+ BBandgaps and references 0 A" W) B7 G* d4 x
Voltage monitors 8 |: n1 ?% R- d1 U/ s1 Y
Analog-to-digital and digital-to-analog converters+ s, a5 R# J2 i$ Q
% {, K" J3 r5 }9 z. B. y
职位要求:Job requirements -
8 B/ K3 k3 z! E" U" ^5 A$ F
8 K6 G0 B$ F0 t9 fMSEE degree, with at least 1+ years of design experience. % ~9 L. M" r0 y6 Y
Hands-on design experience with BiCMOS/CMOS mixed-voltage custom circuit designs
% H) K- t# v" D) kMust possess strong intuitive and analytical understanding of transistor-level design and simulation 4 F* r( A7 i" {" c# ]" P
Must understand placement and layout issues with respect to mixed-signal IC’s
7 N+ l2 m7 f) @. A2 w" sMust be familiar with Cadence mixed signal design flow.
# ]4 i7 R# i+ |' }1 u# @- H3 TGood English communication skill |
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