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[經驗交流] 請教90/65奈米,SOC Tape-out一次NRE大約多少

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發表於 2009-8-13 10:26:46 | 顯示全部樓層 |閱讀模式
如題7 s) }8 H7 i& Q. `" G! @, P
9 G% A! X' m- s$ `1 U
請教業界各位先進% O0 G  o6 E3 @4 z9 f( n
目前的chip開發,需要多少投資?
1 V- l2 k+ [! p9 T8 y: n  ?首先是假設 Febless design house.
1 c  m8 Z- ^9 I, R. `- ]% U自家由algorithm 到 RTL simulation 完成4 i* _0 N1 o: S! Q
後端包給 backend service 公司 (layout, mask, Fab, assembly..)
% V- O) W/ i( q( J5 Z2 x以 ARM9 or ARM11, AMBA2.0 為platform& ?+ l. M1 |( `# b7 l
那麼
9 B  Q8 L, P% X0 s+ @# y5 _  (1)90奈米, NRE大概多少?8 K4 H: P( G  j% r/ f( ?- J
  (2)65奈米, NRE大概多少?
8 s. f! c9 q8 Z; B; A8 U: k% X. f  (3)或是您知道其他製程, NRE大約多少...
5 t8 _2 C, M+ |+ ^  f/ a5 P7 q9 W+ l1 Q6 t* X% N; |
謝謝
發表於 2009-8-14 01:17:51 | 顯示全部樓層
Which design service company you will go to?
* z: }3 e& D( I# GHow many mask layers it will be?
8 u; _- b" g# IBesides, ARM, any other IP, like DLL / PLL / EDRAM / USB / LVDS..... and who will be the IP provider(s), wafer Fab? design service companies? or 3rd parties?
& s3 Y; y+ x; [3 e! w- VHow many chips you need? A full set mask or MPW?
, j: g5 W2 X, E5 ]# V; h7 yWhat package you need?
 樓主| 發表於 2009-8-14 08:59:04 | 顯示全部樓層
Well,+ O; _* M. J  g$ S1 f4 k
  ^# D' D* ^9 q" T% V
I just estimate the investiment of a ASIC team.
5 ]8 x3 T! f8 t2 U6 N3 Enot servey for a project.
" n* G3 ]; J7 ]+ [. S* Z. d  ]So, I just want to know the range of NRE.% m8 L5 v& W. Y9 T

4 u' U0 U$ M) N0 n, YFor example, It will be # ^" u$ q0 K$ k9 G
(1) 5,000,000 NT$ ?( p. M. M& d" p
(2) 8,000,000 NT$ ?/ z9 W9 j3 D" @) `, L/ Z* d2 u" v
(3)10,000,000 NT$ ?! o7 s1 c, Y7 y' @
(4)12,000,000 NT$ ?5 y& ]0 F1 S% ?
(5)15,000,000 NT$ ?
5 u& N5 X+ k. g+ C$ H; o- U2 K$ x
Sure, I understand following things:
0 f! O5 F+ G/ ?$ y - full set mask cost more
, N6 Q' N" C) l. Q6 t5 a5 u4 D - PLL/LVDS... analog IP are extra cost& t( \. h8 ?# b3 i1 S- `  B
- pin-count and area also influence cost% c2 T( E) v4 C4 ?1 |
- different package also cost different. ?* U4 g( `5 l- d* q

4 w9 g$ s6 O) D4 uTherefore, if really need information for estimate,4 X0 y6 V1 ?4 H- o
just for example., A" f3 C9 {2 o  X6 |
Let's assume a SoC for FullHD TV application  d3 \9 Z" V" [& a, k; l& E
it will include
) K2 l1 Y4 A8 A$ h5 d  Z+ \  - ARM AMBA
- @7 J% t8 q/ w0 h' V- k  - DDR2 I/F# R+ ]7 m* G* s' l
  - GPIO, IIC,...3 Y- b+ H1 M) K% e
  - LVDS out (dual link)
* |2 {2 @7 V" X  P# ^2 m' \  - Video-in: HDMI(1.2)x2, VGA, YCbCr, A/V, S-V, SCART," e4 N; B( r) g9 v1 d) B
  - 12bit ADC, 10bot ADC x2
0 _6 w1 {4 w+ s+ X# J  - PLL/DLL
- M- m" E- R8 T0 G, P. d2 n" ?  c  - 256 pins 以上: V7 v$ i/ e! G
/ l4 f6 o$ y# @9 ^
Than,... any idea about NRE fee?
/ a! ?& f& r8 t5 |! [) k; ?again, I just want to know the range
發表於 2009-8-14 09:25:01 | 顯示全部樓層
if the ARM and AMBA is hardcore,7 X! G  C* D7 ~5 u. f
basically 65nm-->USD$1M above and 90nm-->700K above
# E3 a3 ?4 e$ X5 E( v0 Mand base on different foundry has difference price!
5 Y7 Q4 O! u4 t+ tthis price did not include any specific IP like TV encoder, decoder, vedio codec....- T$ z8 @6 i! |" C+ ?
and did not include the ARM licensee...4 _. T; `/ ^9 z5 y* U+ y- L/ M1 o
actually! it is not so much IC design in Taiwan tape out 65nm till now!
發表於 2009-8-14 09:28:45 | 顯示全部樓層
sorry, this price also did not include the shuttle or pilot run wafer(basically in 65nm will be USD$3xxx at 13pcs wafer): u8 v* A5 |$ C$ p5 h3 k/ L
and package&testing, so you may count it at USD$1.3~1.5M if you are running turnkey solution!
發表於 2009-10-22 11:06:45 | 顯示全部樓層
need 1M dollar?
發表於 2009-12-15 21:05:38 | 顯示全部樓層

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