標題: 請教90/65奈米,SOC Tape-out一次NRE大約多少 [打印本頁] 作者: ajack 時間: 2009-8-13 10:26 AM 標題: 請教90/65奈米,SOC Tape-out一次NRE大約多少 如題# @) K8 r9 j9 z, R* }" g0 Y% R4 A' v
$ f: b6 g9 ^, t$ Z; [請教業界各位先進/ F& G, j# _2 {, S: g% T
目前的chip開發,需要多少投資? 2 |+ I; q4 U& ` Q首先是假設 Febless design house. 4 [$ g9 t7 z. V自家由algorithm 到 RTL simulation 完成 , ~8 c, N8 C8 j後端包給 backend service 公司 (layout, mask, Fab, assembly..) 2 ]3 o; s" z. w: `以 ARM9 or ARM11, AMBA2.0 為platform 0 o* u4 V: ^4 h# w那麼 7 n5 w( P4 P( m/ d4 I$ K3 X/ T3 I' H (1)90奈米, NRE大概多少? * \. q- t1 Q* b6 E7 R% J2 J (2)65奈米, NRE大概多少? 1 B. P6 f! J9 @; P* p* D7 N (3)或是您知道其他製程, NRE大約多少... ( A* X1 N$ D q& | w3 z! }. r: Z2 E' o& H4 R3 P* a+ R
謝謝作者: elroy216 時間: 2009-8-14 01:17 AM
Which design service company you will go to?; X' q4 Y& Z( O( a; q
How many mask layers it will be? , B6 q4 z2 n5 s; oBesides, ARM, any other IP, like DLL / PLL / EDRAM / USB / LVDS..... and who will be the IP provider(s), wafer Fab? design service companies? or 3rd parties? ' \% u- ]9 j# h, N! u' O' jHow many chips you need? A full set mask or MPW?/ N+ y. A* q- P( Y' w7 b& `
What package you need?作者: ajack 時間: 2009-8-14 08:59 AM
Well, 1 }, V1 A2 j# g1 L8 @4 z4 D/ X/ i' ]; s: t, F) h
I just estimate the investiment of a ASIC team.4 P% Z8 j! J" ?( D) e% i7 m
not servey for a project.! t1 f( _5 E" W, l- O
So, I just want to know the range of NRE. & @5 k" _, l6 b0 B e , I6 e/ D# N' _5 B2 mFor example, It will be 1 w# G; S- D: R# y" E$ p: A& C8 I(1) 5,000,000 NT$ ? 4 p$ z4 n ^" _$ ^- D/ ]* g. |4 i(2) 8,000,000 NT$ ?4 }( Q0 W8 d, ]% p5 l
(3)10,000,000 NT$ ?1 T1 C. N! v1 D- }3 d s4 `
(4)12,000,000 NT$ ? 4 Y: a+ n& K% E2 R Q(5)15,000,000 NT$ ?! a/ a# `% s6 r' {' p5 W% A9 r
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Sure, I understand following things: " ^( y6 ^/ k8 T* a" _2 F& S - full set mask cost more " ]+ y o3 i4 t- _0 f+ F3 B - PLL/LVDS... analog IP are extra cost& E5 A( V& l( ?1 s- @
- pin-count and area also influence cost) M% Q/ q! y" j* B8 {# m
- different package also cost different( _7 W% N$ _; [0 }3 f
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Therefore, if really need information for estimate,6 r5 E5 D; P. A2 P0 k
just for example.2 m7 `" J9 ~$ K3 @6 i' Q
Let's assume a SoC for FullHD TV application G4 |: p6 |) h ?( O" w8 @6 H2 Oit will include & D$ y2 J, m: d9 h# F - ARM AMBA; E, \* z- [0 c1 S
- DDR2 I/F # O/ Q5 m; I* I Y- D. u; ~3 g - GPIO, IIC,...6 v+ c0 [& H1 T
- LVDS out (dual link) / R7 R# I: E1 ?1 w9 o0 g - Video-in: HDMI(1.2)x2, VGA, YCbCr, A/V, S-V, SCART, ; U" o; G. v7 W - 12bit ADC, 10bot ADC x2 $ D* d9 ~0 D y( r' f2 Q - PLL/DLL ; i/ ?& Q; @9 A' q+ o% l& m - 256 pins 以上 0 X- H+ l. G F/ N$ { + a- P2 F. q. j! w f- PThan,... any idea about NRE fee?" r9 N' _2 O) ~
again, I just want to know the range作者: alex3010 時間: 2009-8-14 09:25 AM
if the ARM and AMBA is hardcore,' @5 v5 ?/ p6 `( a# U; R! b/ Q& K, j
basically 65nm-->USD$1M above and 90nm-->700K above 9 {0 X$ S2 \$ Jand base on different foundry has difference price! ; D2 e2 w! ?$ j$ W4 X/ s) othis price did not include any specific IP like TV encoder, decoder, vedio codec.... S$ u3 r% X0 D- ?' `, |) band did not include the ARM licensee...8 b! z& d4 a1 W) p' Q
actually! it is not so much IC design in Taiwan tape out 65nm till now!作者: alex3010 時間: 2009-8-14 09:28 AM
sorry, this price also did not include the shuttle or pilot run wafer(basically in 65nm will be USD$3xxx at 13pcs wafer) + N! u" j. Y& D+ ?5 i3 j8 D2 uand package&testing, so you may count it at USD$1.3~1.5M if you are running turnkey solution!作者: semico_ljj 時間: 2009-10-22 11:06 AM
need 1M dollar?作者: hkgcrcom 時間: 2009-12-15 09:05 PM 標題: 今天天氣不錯! 頂頂更健康，支持一下。 qq自由幻想外掛