標題: 10/20 2011 Oct. Altera TechRoad Show in Taipei [打印本頁] 作者: mister_liu 時間: 2011-10-5 02:45 PM 標題: 10/20 2011 Oct. Altera TechRoad Show in Taipei [attach]14033[/attach]8 g" c% K. l" O( O3 _, y# ^
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Altera and its collaborating distributors are hosting free, technology-focused seminars across 13 cities in the Asia Pacific region. These seminars will be held in China, Korea, Malaysia, Taiwan, and India from August through November of 2011.+ ]# z0 u, i8 y7 z2 S$ x& v' N0 H
9 Z$ J' A( ~$ o# s9 S; Y& bTechnology Roadshow 2011 highlights how Altera's latest industry-leading 28-nm technology can meet the diverse design needs of its customers. At these seminars, you'll learn how Altera's portfolio of 28-nm devices – which include Stratix® V, Arria® V, and Cyclone® V FPGAs – can optimize the solutions that address your power, performance, and cost requirements. , ^3 Y% X# Z5 Y( `; ]+ ~ z( S r0 c$ E8 R& J2 K4 O
There will be presentations that show you how Qsys, the next generation of SOPC Builder, can take your FPGA design to the next level. You will also learn about the updated features and functions of Quartus® II software. These include the new Qsys system integration tool, new device support expansion, and faster board bring-up with improved debug solutions. ; W: O: u- d0 t: q. q! i. g 7 k7 T' ]; X$ U9 ^/ pIn addition, you will get to watch live demonstrations of various innovative technologies from Altera and its industry partners, such as Linear Technology, Silicon Labs, Tektronix, The MathWorks, and Terasic.作者: mister_liu 時間: 2011-10-5 02:45 PM Topics covered include:
Altera's 28-nm FPGA portfolio
Backplane design and optimization using 28-nm FPGAs
Using variable-precision digital signal processing (DSP) blocks in 28-nm FPGAs
External memory interface implementation using 28-nm FPGAs
Qsys: 5 reasons to switch from SOPC Builder to Qsys
Implementing video systems using the Altera® video framework
PCI Express® technology in 28-nm FPGAs
Optimizing power and performance in 28-nm FPGA designs
What's new in Quartus II software v11.0
Model-based design for Altera FPGAs using HDL code generation
. S$ h1 I0 \' x, K1 } ! b, |5 E1 V" q; p- {: ^View complete event agenda and registration details 2 K% J- D- e! oIn addition, you will get to watch live demonstrations and various innovative technologies from Altera and its industry partners, such as Linear Technology, MathWorks, Tektronix, and Terasic. Each registered attendee will receive a full set of presentation materials and the latest Altera collateral.Who Should Attend 8 ]0 s$ d5 r# g) Z9 E/ z, x4 LSystem architects, DSP and high-speed design engineers, FPGA developers, engineering managers, and technical managers can all benefit from these presentations./ a2 f( f- u& y$ Y
3 [- A& J8 Z+ wRegister for the event and secure your seat today!Related Links